1. Field of the Invention
The present invention relates to a D/A converter which converts digital pixel data into analog video signals, a display apparatus in which an amplifier for amplifying an output from the D/A converter and a signal line selection circuit are formed integrally with a pixel array portion on an insulation substrate, a digital-to-analog conversion circuit for converting a digital signal into an analog signal, and a digital-to-analog conversion method.
2. Related Background Art
A liquid display apparatus having a pixel array portion and a drive circuit formed on the same glass substrate has been developed at a full blast. Forming the pixel array portion and the drive circuit on the same glass substrate can reduce the thickness and size of the entire liquid crystal display apparatus, and the liquid crystal display apparatus can be extensively used as a display unit of a portable device such as a mobile phone or a notebook computer.
In this type of liquid crystal display apparatus in which the drive circuit is integrated, TFTs are formed on the glass substrate by using polysilicon or the like, and both the pixel array portion and the drive circuit are formed by using these TFTs (thin film transistors).
However, since the operation speed of the TFT formed on the glass substrate is not very fast, various kinds of ingenuity of circuits are required in order to constitute the drive circuit. Further, forming the TFT with the uniform characteristics on the glass substrate is technically difficult at the present moment, and deterioration in display quality, e.g., irregularities in display may occur due to a difference in characteristics of the TFTs.
Furthermore, when the pixel array portion and the drive circuit are formed on the same glass substrate, a percentage of the pixel array portion which occupies an area of the glass substrate becomes relatively small, and a frame becomes disadvantageously large.
FIG. 47 is a circuit diagram showing a prior art DAC constituted by using polysilicon TFTs on the glass substrate, which is disclosed in Japanese patent application laid-open No. 340072/1998. The DAC in FIG. 7 turns either a switch SW21 or SW22 in accordance with a value of each bit of a digital signal. As a result, a node A has a reference voltage Vref or a ground voltage. At the beginning, a switch SW 23 is in the off state, and the electric charge stored in a capacitor element C21 is redistributed to a capacitor element C22. This processing is repeated with respect to each bit of the digital signal.
Upon completing this processing, switches SW24 and Sw25 enter the off state, whilst switches SW26 and SW27 enter the on state. As a result, a voltage of a node B is transferred to an output of an amplifier, and an offset voltage stored in a capacitor element C23 in a negative feedback loop is simultaneously withheld.
With this processing, a voltage obtained after D/A conversion is outputted from the amplifier. After termination of the D/A conversion processing, a switch SW28 is turned on, and signal line writing is performed.
Since the DAC in FIG. 47 performs storage and redistribution of the electric charge in accordance with each bit of the digital signal, the D/A conversion takes time, and the signal line write time is shortened. Therefore, the signal line can not possibly satisfactorily rise or fall to a desired voltage, and irregularities in brightness or the like occurs, which leads to degradation in display quality.
Furthermore, the DAC in FIG. 47 and the amplifier provided at the rear stage of the DAC are required for each signal line, and power consumption hence increases and an area occupied by the circuits becomes large, thereby disabling reduction in the frame size.